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Charging Ahead With AMD’s Kaveri (Part 1)

4/2/2014 4:02:42 PM

Set to succeed both the Trinity and Richland APUs, AMD’s Kaveri further unifies both processor and graphics cores.

Intel may be the current dominant player in the CPU space, pushing CPU compute performance as well as the boundaries of integrated graphics capabilities with its Core processor family, but AMD’s approach to the unification of CPU and GPU cores is proving more holistic. The release of their third-generation APU architecture, codenamed Kaveri, is a testament to this. Positioned as an ideal choice for gaming platforms, both CPU and graphics have been updated for better performances, with a much deeper level of integration that’s blurring the lines between CPU and GPU cores.

 

Description:

Kaveri has been the aim for AMD for several years,
it's actually the whole reason the company bought ATI back in 2006.

Kaveri Examined

Launched in early January, one of the major changes introduced with Kaveri is its shared unified memory architecture named hUMA (Heterogeneous Unified Memory Architecture). hUMA provides a common memory space that both processor and graphics cores of the Kaveri APU can access, giving the GPU core the ability to read from, and write to, the same data that the CPU is using, and vice versa. This feature will also reportedly enhance the manner in which supported software interacts with the memory space.

Kaveri is AMD’s 3rd generation Bulldozer architecture on a half-node process shrink

Besides sharing such a space, there are improvements made to the processor and graphics cores. The processor compute cores currently feature the next-generation Steamroller x86 architecture, which emphasizes performance at lower power. In addition, the new microarchitecture also allows for new instruction sets to be processed, marking an improvement from the previous generation Bulldozer architecture. The graphics engine core has also been updated with Graphics Core Next architecture; the same as found on the Radeon R9 290X and R9 290, codenamed Hawaii.

The implementation of hUMA in the Kaveri APU takes AMD another step closer to the goals behind their HSA (Heterogeneous Systems Architecture) concept, where CPU and GPU cores can work coherently together. In Kaveri, CPU and GPU cores are grouped as a whole and known as “compute units”, where applications can use to run processes. Both compute units are equal, each being able to create and dispatch their own instructions. As a result, applications can theoretically tap the parallel- computing prowess of the GCN GPU cores, while leaving tasks that require serial processing for the x86 processor cores. The caveat is of course, not all applications can take advantage of the GPU for parallel processing and can only use the x86 cores like a regular processor. The task then falls onto developers to code for the new architecture.

 

Description:

AMD refers to this as an "APU optimized" process,
somewhere in between what a CPU and what a GPU needs

Kaveri also features support for PCIe 3.0. This means the data transfer rate between the APU and a paired discrete graphics card is increased to the theoretical maximum of 8.0GT/s; instead of being capped at 5.0GT/s of its predecessors on PCIe 2.0. Besides speedier communication on the upgraded bus, the Kaveri APU has another two features that will appeal to gamers. With support for AMD TrueAudio technology, game developers are able to create an immersive gaming atmosphere, through the use of positional audio that is rendered in real-time. The new audio technology is able to handle multiple audio streams simultaneously, and AMD even claims that all these effects are accomplished without taxing the CPU cores unnecessarily. Other gaming features that made it into Kaveri include AMD’s Mantle Application Programming Interface (API). This allows game developers to tap into the GCN-based graphics cores to unleash the full potential of the graphics engine efficiently. Developers also won’t have to waste time optimizing for different platforms as Mantle-capable titles have already been optimized at the hardware level.

 

 

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